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专利名称：PHASE COMPARISON CIRCUIT AND PLL
SYNTHESIZER USING THE SAME
发明人：OHTSUKA, Shigeki, THINE ELECTRONICS,
INC.
申请号：EP07706577.9申请日：20070111公开号：EP1978639A1公开日：20081008
专利附图：
摘要：The phase comparison circuit according to an embodiment of the presentinvention comprises a fractional frequency divider 31 which generates a fractional
frequency-divided signal Svn obtained by performing fractional frequency division on aclock on the basis of a control signal from a control circuit 32, a first integer frequencydivider 33 which generates a first integer frequency-divided signal obtained byperforming integer frequency division on the fractional frequency-divided signal Svn, asecond integer frequency divider 34 which generates a second integer frequency-dividedsignal obtained by performing integer frequency division on a reference clock, a firstselection circuit 35 which selectively outputs either the fractional frequency-divided signalSvn or the first integer frequency-divided signal on the basis of a switching signal, asecond selection circuit 36 which selectively outputs either the reference clock or thesecond integer frequency-divided signal on the basis of the switching signal from thecontrol circuit 32, and a phase comparator 37 which generates a comparison signal whichrepresents the frequency difference and phase difference between the output signalfrom the first selection circuit 35 and the output signal from the second selection circuit36.
申请人：Thine Electronics, Inc.
地址：3-3-6, Nihombashi-Honcho, Chuo-ku Tokyo 103-0023 JP
国籍：JP
代理机构：Flutter, Paula
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