专利内容由知识产权出版社提供
专利名称：MULTI-PROCESSOR SYSTEM发明人：INAGAMI, YASUHIRO,NAKAGAWA,
TAKAYUKI HITACHI DAIYONKYOSHINRYO,NAGASHIMA, SHIGEO
申请号：EP86118136申请日：19861230公开号：EP0231526A3公开日：19881012
摘要：A multi-processor system including a main storage (1) for storing instructionsand data, a master processor (3) for supplying to a slave processor (4) data required forthe processing to be executed by the slave processor and commanding initiation of theprocessing, the master processor further having a function to test the operation state ofthe slave processor and perform processing by utilizing the result of th processingexecuted by the slave processor. The slave processor (4) initiates the processing underthe command of the master processor and has a function to inform of the masterprocessor of completion of the processing. The slave processor has a function to executea pause instruction for suspending temporarily activation of processing for a succeedinginstruction and setting a pause indication at an indicator (453,454,455) of the slaveprocessor. When the pause indication is set in the slave processor, the master processorhas a function to reset this indication to release the slave processor from the pause state.When the pause state indication is not set, the master processor executes a clearinginstruction supplied from the main storage for suspending the function to activate thesucceeding instruction. The processor is further imparted with a function for setting at
the indicator an indication instruction indicating completion of execution of thesucceeding instruction. The master processor is imparted with a function to reset theindication of completed execution of instruction set at the slave processor and otherwiseexecute an indication resetting instruction for suspending activation of a succeedinginstruction.
申请人：HITACHI, LTD.
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