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专利名称：Methods and apparatus for efficient
communication between caches inhierarchical caching design
发明人：Ron Shalev,Yiftach Gilad,Shlomo Raikin,Igor
Yanover,Stanislav Shwartsman,Raanan Sade
申请号：US13994399申请日：20111223公开号：US09411728B2公开日：20160809
专利附图：
摘要：In accordance with embodiments disclosed herein, there are provided methods,
systems, mechanisms, techniques, and apparatuses for implementing efficientcommunication between caches in hierarchical caching design. For example, in oneembodiment, such means may include an integrated circuit having a data bus; a lowerlevel cache communicably interfaced with the data bus; a higher level cache
communicably interfaced with the data bus; one or more data buffers and one or moredataless buffers. The data buffers in such an embodiment being communicably interfacedwith the data bus, and each of the one or more data buffers having a buffer memory tobuffer a full cache line, one or more control bits to indicate state of the respective databuffer, and an address associated with the full cache line. The dataless buffers in such anembodiment being incapable of storing a full cache line and having one or more controlbits to indicate state of the respective dataless buffer and an address for an inter-cachetransfer line associated with the respective dataless buffer. In such an embodiment, inter-cache transfer logic is to request the inter-cache transfer line from the higher level cachevia the data bus and is to further write the inter-cache transfer line into the lower levelcache from the data bus.
申请人：Ron Shalev,Yiftach Gilad,Shlomo Raikin,Igor Yanover,StanislavShwartsman,Raanan Sade
地址：Ceaseria IL,Givat Ada IL,Ofer IL,Nesher IL,Haifa IL,Kibutz Sarid IL
国籍：IL,IL,IL,IL,IL,IL
代理机构：Nicholson De Vos Webster & Elliott LLP
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